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The chalcogenide material used for phase-change applications in rewritable optical storage (Ge2Sb2Te5) has been integrated with a 0.5-μm radiation-hardened CMOS process to produce 64-Kbit memory arrays. On selected arrays, electrical testing demonstrated up to 100% memory cell yield, 100-ns programming and read speeds, and write currents as low as 1 mA/bit. Devices functioned normally from -55°C to 125°C. Write/read endurance has been demonstrated to 1×108 before first bit failure. Total ionizing dose (TID) testing to 2 Mrad(Si) showed no degradation of chalcogenide memory element, but it identified a write current generator circuit degradation specific to the test chip, which can be easily corrected in the next generation of array and product. Static single-event effects (SEE) testing showed no effect to an effective linear energy transfer (LETEFF) of 98 MeV/mg/cm2. Dynamic SEE testing showed no latchup or single-event gate rupture (SEGR) to an LETEFF of 123 MeV/mg/cm2. Two sensitive circuits, neither containing chalcogenide elements, and both with small error cross sections, were identified. The sense amp appears sensitive to transients when reading the high-resistance state. The write driver circuit may be falsely activated during a read cycle, resulting in a reprogrammed bit. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material.