By Topic

SiSMA-a tool for efficient analysis of analog CMOS integrated circuits affected by device mismatch

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Biagetti, G. ; Dipt. di Elettronica, Univ. Politecnica delle Marche, Ancona, Italy ; Orcioni, S. ; Turchetti, C. ; Crippa, P.
more authors

In this paper a simulator for the statistical analysis of analog CMOS integrated circuits affected by technological tolerance effects, including device mismatch, is presented. The tool, able to perform dc, ac, and transient analyses, is based on a rigorous formulation of circuit equations starting from the modified nodal analysis and including random current sources to take into account technological tolerances. Statistical simulation of specific circuits shows that the simulator requires a simulation time several orders of magnitude lower than that required by Monte Carlo analysis, while ensuring a good accuracy.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:23 ,  Issue: 2 )