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Bit-error-rate performance of intra-chip wireless interconnect systems

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1 Author(s)
Zhang, Y.P. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

This Letter evaluates the bit-error rate (BER) performance of a coherent binary phase-shift keying interconnect system operating on an intra-chip wireless channel at 15 GHz. Results show that the system performance degrades with the separation distance and the data rate. A high data rate at 2 Gb/s with a low BER<10-5 over the entire chip of size 20 × 20 mm can be achieved with the transmitted power of 10 dBm.

Published in:
Communications Letters, IEEE  (Volume:8 ,  Issue: 1 )

Date of Publication: Jan. 2004

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