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High-speed, low-complexity systolic designs of novel iterative division algorithms in GF(2m)

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4 Author(s)
Chien-Hsing Wu ; Electr. Eng. Dept., Nat. Chung-Cheng Univ., Ming-Hsiung, Taiwan ; Chien-Ming Wu ; Ming-Der Shieh ; Yin-Tsung Hwang

We extend the binary algorithm invented by Stein and propose novel iterative division algorithms over GF(2m) for systolic VLSI realization. While algorithm EBg is a basic prototype with guaranteed convergence in at most 2m - 1 iterations, its variants, algorithms EBd and EBdf, are designed for reduced complexity and fixed critical path delay, respectively. We show that algorithms EBd and EBdf can be mapped to parallel-in parallel-out systolic circuits with low area-time complexities of O(m2loglogm) and O(m2), respectively. Compared to the systolic designs based on the extended Euclid's algorithm, our circuits exhibit significant speed and area advantages.

Published in:

IEEE Transactions on Computers  (Volume:53 ,  Issue: 3 )