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Nonuniform cache architectures for wire-delay dominated on-chip caches

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3 Author(s)
Changkyu Kim ; Texas Univ., Austin, TX, USA ; D. Burger ; S. W. Keckler

Nonuniform cache access designs solve the on-chip wire delay problem for future large integrated caches. By embedding a network in the cache, NUCA designs let data migrate within the cache, clustering the working set nearest the processor. The authors propose several designs that treat the cache as a network of banks and facilitate nonuniform accesses to different physical regions. NUCA architectures offer low-latency access, increased scalability, and greater performance stability than conventional uniform access cache architectures.

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IEEE Micro  (Volume:23 ,  Issue: 6 )