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Transient-fault recovery for chip multiprocessors

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4 Author(s)
Gomaa, M.A. ; Purdue Univ., West Lafayette, IN, USA ; Scarbrough, C. ; Vijaykumar, T.N. ; Pomeranz, I.

Chip-level redundant threading with recovery (CRTR) for chip multiprocessors extends previous transient-fault detection schemes to provide fault recovery. To hide interprocessor latency, CRTR uses a long slack enabled by asymmetric commit and uses the trailing thread state for recovery. CRTR increases bandwidth supply by pipelining communication paths and reduces bandwidth demand by extending the dependence-based checking elision.

Published in:

Micro, IEEE  (Volume:23 ,  Issue: 6 )