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As we move to deep sub-micron designs below 0.18 microns, the delay, area, and power dissipation of a circuit is dominated by the interconnections (routes) between the transistors. The interconnection pattern for each set of pins that must be connected (net) is a Steiner tree, and the primary sub-problem in (global) routing is to find a minimal Steiner tree. In this paper, we present a new algorithm, called "shrubbery, "for solving the Steiner tree problem. We evaluate the performance of shrubbery by running simulations with a large number of benchmarks from SteinLib and comparing our results to those obtained with the very popular Shortest Path Heuristic (SPH) developed by Takahashi and Matsuyama. Our results show that shrubbery is able to consistently find optimal or near optimal solutions, but in less time than SPH.