Skip to Main Content
This work presents a novel dynamic bias control technique to verify the circuit performance of the low-power rail-to-rail input/output buffer amplifier, which can be operating in strong inversion or weak inversion region for different design specifications. This output buffer is well suited to be integrated with a digital-to-analog converter because of the small die area of 0.01 mm2 and low power consumption of 3.07 μW. For different system applications, this proposed circuit technique could be implemented to provide the IC designers a quick method of reliable validation to reduce the risks of new product and time to market.
Date of Conference: 2004