By Topic

Partial tag comparison: a new technology for power-efficient set-associative cache designs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Rui Min ; Dept. of Electr. & Comput. Eng. & Comput. Sci., Cincinnati Univ., OH, USA ; Xu, Z. ; Yiming Hu ; Wen-Ben Jone

We call comparing a small part of two tags a Partial Comparison. In this paper, we show that the partial comparison method can filter out most of the unmatched tag comparisons for different cache configurations. The delay of the partial comparison operation is only 60% of that of the full comparison. This paper proposes to use the partial comparison technique to reduce energy dissipation on major cache components of set-associative caches. We show that when adaptive schemes based on partial comparison are applied to amplifiers and bit-lines, the power consumption of set-associative caches is similar to that of direct-mapped caches. We used the CACTI cache model to evaluate the proposed cache architecture and the Simplescalar CPU simulator to produce final results. The power simulation results suggest that the proposed set-associative cache architecture is very power-efficient. In the simulated cache configurations, 25%-60% of cache accessing energy was saved.

Published in:

VLSI Design, 2004. Proceedings. 17th International Conference on

Date of Conference:

2004