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A 2.5 GHz CMOS fully-integrated ΔΣ-controlled fractional-N frequency synthesizer

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1 Author(s)
Dehghani, R. ; Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran

The design of a fully-integrated ΔΣ-controlled fractional-N frequency synthesizer is described. Using a dual modulus 64/72 prescaler based on injection locking technique and a novel third order digital ΔΣ modulator, we achieved an extremely low power synthesizer in 2.5 GHz band. Total power dissipation of the frequency synthesizer is less than 6 mW at a 1.5 V supply. The loop bandwidth is optimized to achieve a -123 dBc/Hz phase noise at 3 MHz offset frequency. The locking time of the loop is less than 30 μs.

Published in:

VLSI Design, 2004. Proceedings. 17th International Conference on

Date of Conference:

2004

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