By Topic

High level design validation: current practices and future directions

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
I. Ghosh ; Fujitsu Labs. of America, Inc., Sunnyvale, CA, USA ; M. Prasad ; R. Mukherjee ; M. Fujita

This paper describes about the increasing complexity of VLSI design, time to market pressures. The two major paradigms to address the difficulties currently being faced by industry are: (1) the use of higher levels of design abstraction and (2) efficient and seamless design reuse. Current industrial practices and academic research in design verification and validation are also discussed.

Published in:

VLSI Design, 2004. Proceedings. 17th International Conference on

Date of Conference: