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The objective of this paper is to investigate the optimal common-mode reduction PWM techniques when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one third for the inverter with diode front end, which is widely used in the industry. Intensive measured results are presented to fully support the claims.