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This paper reports a current mirroring integration (CMI) CMOS readout circuit for high-resolution quantum well infrared photodetectors (QWIPs). The circuit uses a feedback structure with current mirrors to provide stable bias voltage across the photodetectors, which can be adjusted between 0 V and 3.5 V. The photodetector current is mirrored to an integration capacitor which can be placed outside of the unit pixel, reducing the pixel area and allowing integrating the current on larger capacitances for larger charge storage capacity and dynamic range. With the current feedback in the CMI structure, very low (ideally zero) input impedance is achieved. The readout circuit integrated with CMI provides a maximum charge storage capacity of 170/spl times/10/sup 6/ electrons and a maximum transimpedance of 17.6/spl times/10/sup 6/ /spl Omega/ for a 5 V power supply and 6.8 pF off-pixel integration capacitance. A 64/spl times/64 FPA circuit prototype has been implemented in a 0.8/spl mu/m CMOS process and hybrid connected to a 64/spl times/64 QWIP FPA. The fabricated chip has 38/spl mu/m pixel pitch and results in a total chip area of 3.2mm/spl times/4.0mm. The operation of the fabricated circuit together with QWIP FPA is verified. The measured dynamic range of the circuit is more than 96 dB for maximum charge storage case and non-linearity of the circuit is smaller than 4 least significant bits (LSB) for 10-bit resolution.
Date of Conference: 16-18 Sept. 2003