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We report an 8-GHz clock-rate, second-order continuous-time Σ-Δ analog-digital converter (ADC) that achieves 57.4-, 51.7-, and 40.2-dB SNR at signal sampling rates of 125, 250, and 500 Ms/s, respectively. The integrated circuit occupied 1.45-mm2 die area, contains 76 transistors, is fabricated in an InP-based HBT technology, and dissipates ∼1.8 W. We also study the effect of excess delay on modulator performance, and show that excess delay does not affect performance as long as the centroid-in-time of the digital-analog converter pulse remains stationary.
Microwave Theory and Techniques, IEEE Transactions on (Volume:51 , Issue: 12 )
Date of Publication: Dec. 2003