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Resonant gate tunneling current in double-gate SOI: a simulation study

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3 Author(s)
Choi, Chang-Hoon ; Center for Integrated Syst., Stanford Univ., CA, USA ; Zhiping Yu ; Dutton, R.W.

Gate tunneling current in fully depleted, double-gate (DG) silicon-on-insulator (SOI) MOSFETs is characterized based on quantum-mechanical principles. The gate tunneling current for symmetrical DG SOI with ground-plane (tox = 1.5 nm and TSI = 5 nm) is shown to be higher relative to single-gate (bulk) MOS structure. The tunneling is enhanced as the silicon layer becomes thinner since the thinner silicon layer acts a deep quantum well. The simulated IG-VG of DG SOI has negative differential resistance like that of the resonant tunnel diodes at the gate bias ∼ 1.4 V.

Published in:

Electron Devices, IEEE Transactions on  (Volume:50 ,  Issue: 12 )

Date of Publication:

Dec. 2003

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