Resonant gate tunneling current in double-gate SOI: a simulation study

Gate tunneling current in fully depleted, double-gate (DG) silicon-on-insulator (SOI) MOSFETs is characterized based on quantum-mechanical principles. The gate tunneling current for symmetrical DG SOI with ground-plane (t/sub ox/ = 1.5 nm and T/sub SI/ = 5 nm) is shown to be higher relative to single-gate (bulk) MOS structure. The tunneling is enhanced as the silicon layer becomes thinner since the thinner silicon layer acts a deep quantum well. The simulated I/sub G/-V/sub G/ of DG SOI has negative differential resistance like that of the resonant tunnel diodes at the gate bias /spl sim/ 1.4 V.