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Equalization and clock recovery for a 2.5-10-Gb/s 2-PAM/4-PAM backplane transceiver cell

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13 Author(s)
J. L. Zerbe ; Rambus Inc., Los Altos, CA, USA ; C. W. Werner ; V. Stojanovic ; F. Chen
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A folded multitap transmitter equalizer and multitap receiver equalizer counteract the losses and reflections present in the backplane environment. A flexible 2-PAM/4-PAM clock data recovery circuit uses select transitions for receive clock recovery. Bit-error rate less than 10-15 and power equal to 40 mW/Gb/s has been measured when operating over a 20-in backplane with two connectors at 10 Gb/s.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:38 ,  Issue: 12 )