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Experimental evaluation of code properties for WCET analysis

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2 Author(s)
A. Colin ; Dept. of Comput. Sci., York Univ., UK ; S. M. Petters

This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units, and out-of-order execution units have on the worst-case execution time (WCET) of programs. These features are present in processors (e.g. PowerPC) that are being widely used in embedded and real-time systems. We present an experimental evaluation of the execution time of a series of synthetic benchmarks and real-life case studies. The execution time is evaluated using extensive testing and a simple WCET technique. We show that the most important factor in reduction of execution time is cache size (both instruction and data cache). Other factors like branch prediction and out-of-order execution have minimal improvements that are cancelled out by the pessimism of the analysis. We also argue that some of the performance gain of advanced processor features also applies to the worst case and although WCET estimates may be more pessimistic the overall impact is that they result in lower WCET estimates.

Published in:

Real-Time Systems Symposium, 2003. RTSS 2003. 24th IEEE

Date of Conference:

3-5 Dec. 2003