Long-length (256-pt. or 512-pt.) DCT is widely used in audio compression standards such as AC-3. Most current short-length (8-pt.) DCT processor designs cannot be easily extended to efficiently compute the long-length DCT due to the high hardware complexity and/or the irregular interconnection wirings. In this paper, several hardware-efficient long-length DCT architectures are proposed using high-radix recursive decomposition of the coefficient matrix. The architectures employ both conventional arithmetic (multipliers and adders) and ROM-based distributed arithmetic to realize the multiplication of the decomposed matrices. Compared with the linearly increasing number of arithmetic units or exponentially increasing ROM size in many previously proposed methods, our new architectures require only order O(logN) arithmetic units and/or order O(NlogN) words of ROM. Furthermore, the proposed regular architectures are easily extended to compute long-length DCT.
Published in:
VLSI Technology, Systems, and Applications, 2003 International Symposium on
Date of Conference: 6-8 Oct. 2003