Referenced Items are not available for this document.
80 Gbit/s operation of a static D-type flip-flop (D-FF) circuit was achieved using InP-based HEMT technology with a cut-off frequency of 245 GHz and a transconductance of 1500 mS/mm. To generate 80 GHz differential clock signals from the single phase one in the circuit, a rat-race circuit was placed in front of the clock buffer. The power supply voltage was -5.7 V and power consumption was 1.2 W. Its performance was measured using a selector module that we developed. The results showed that the D-FF operated at 80 Gbit/s, which was more than half as much again as speeds reported to date.
Published in:
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003. 25th Annual Technical Digest 2003. IEEE
Date of Conference: 9-12 Nov. 2003
- Page(s):
- 165 - 168
- ISSN :
- 1064-7775
- Print ISBN:
- 0-7803-7833-4
- INSPEC Accession Number:
- 7913553
- Conference Location :
- San Diego, CA, USA
- Digital Object Identifier :
- 10.1109/GAAS.2003.1252386
- Product Type:
- Conference Publications
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