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80 Gbit/s operation of a static D-type flip-flop (D-FF) circuit was achieved using InP-based HEMT technology with a cut-off frequency of 245 GHz and a transconductance of 1500 mS/mm. To generate 80 GHz differential clock signals from the single phase one in the circuit, a rat-race circuit was placed in front of the clock buffer. The power supply voltage was -5.7 V and power consumption was 1.2 W. Its performance was measured using a selector module that we developed. The results showed that the D-FF operated at 80 Gbit/s, which was more than half as much again as speeds reported to date.
Date of Conference: 9-12 Nov. 2003