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Heterogeneous redundancy for fault and defect tolerance with complexity independent area overhead

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2 Author(s)
V. V. Kumar ; Dept. of Electr. & Comput. Eng., Virginia Univ., Charlottesville, VA, USA ; J. Lach

The continuous increase in digital system complexity is raising the area cost of redundancy-based fault and defect tolerance. This paper introduces a technique for heterogeneous redundancy in control path and datapath circuitry that provides high reliability with area overhead that is independent of system complexity. Small amounts of circuit-specific reconfigurable logic are finely integrated with fixed-logic circuitry to provide fine-grained heterogeneous fault and defect tolerance. Results reveal that the technique is effective for a variety of circuits, providing high reliability with a constant magnitude area overhead that is independent of system complexity.

Published in:

Defect and Fault Tolerance in VLSI Systems, 2003. Proceedings. 18th IEEE International Symposium on

Date of Conference:

3-5 Nov. 2003