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A mixed-signal continuous time behavioral model of a continuous time delta-sigma modulator (CT ΔΣ) is presented. CT ΔΣ modulators, by their nature, are mixed-signal systems. That fact creates a discontinuity in the traditional IC design flow which assumes that "discrete" and "continuous" time domain designs require separate design tools. We present a top level behavioral CT ΔΣ model that can be used within the analog IC design environment. High speed CT ΔΣ modulators are implemented using both "analog" and "digital" subblocks. We created mixed-signal models of the subblocks in order to efficiently perform simulations that accurately reflect circuit behavior in the continuous time domain. The models were built out of primitives available in SPICE and Verilog-A™. We present a first order CT low-pass ΔΣ (CTLP ΔΣ) as well as a fourth order CT band-pass ΔΣ (CTBP ΔΣ) to demonstrate the modeling technique and simulation methodology. We explored the influence of the loop delay and clock jitter on the CT ΔΣ performance.