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A 180 nm phase-change device is developed for embedded SoC memory to replace both DRAM and Flash memories. In order to reduce power consumption, the total volume of the device must be reduced and the programming speed must be increased. The speed of programming and reading of chalcogenide memory devices is investigated. It is discovered that the writing speed of the devices using Ge2Sb2Te5 as the storage media is compromised when the chalcogenide film is ultra thin. With doping of Sn, the writing speed is dramatically increased. The maximum programming time (SET) is reduced from 200 ns to 40 ns and that for RESET from 40 ns to 10 ns. Moreover, the reading speed is also improved as a result of lower resistance.