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Platform architecture design for MPEG-4 video coding

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4 Author(s)
Wei-Min Chao ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Chang, Y. ; Chih-Wei Hsu ; Liang-Gee Chen

This paper presents a cost-effective platform architecture design for MPEG-4 video coding. A fast motion estimator architecture supporting predictive diamond search and spiral full search with halfway termination is implemented to make good compromise between compression performance and design cost. An efficient block-level scheduling for texture coding engine is employed to reduce the hardware cost. Both these key modules are integrated into an efficient platform in hardware/software co-design fashion. With high degree of optimization in both algorithm and architecture levels, a cost-efficient video encoder is implemented. It consumes 256.8 mW at 40 MHz and achieves real-time encoding of 30 CIF (352×288) frames per second.

Published in:

Image Processing, 2003. ICIP 2003. Proceedings. 2003 International Conference on  (Volume:3 )

Date of Conference:

14-17 Sept. 2003