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Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery

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3 Author(s)
Youngdon Choi ; Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea ; Deog-Kyoon Jeong ; W. Kim

Bang-bang controlled clock-recovery is widely used in serial link applications as it offers ideal matching between the timing and data samplers and is amenable to fast digital implementation. However, the bang-bang phase detection discards the magnitude information of the timing error and results in inconsistent loop dynamics that vary with the input-noise characteristics. This paper analyzes the jitter-dependent behavior of the tracked oversampling clock-recovery loop, by introducing the concept of effective phase detector gain. Three methods to stabilize the loop bandwidth against jitter variation are described and compared: adapting the loop gain, increasing the oversampling ratio, and adjusting the sampling points. The analyses are then verified with the jitter transfer characteristics obtained from time-step behavioral simulation.

Published in:

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing  (Volume:50 ,  Issue: 11 )