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This paper presents an integrated yield enhancement strategy which utilizes a combination of SRAM bitmap and other techniques to achieve fast yield learning for advanced 130 nm copper process. As device manufacturers implement copper manufacturing capability at increasing smaller geometries, it is crucial to detect, understand and eliminate copper process induced defects. Defect modes from copper dual-damascene process are different from those in the subtractive Aluminium process. At 130 nm node, buried defects and poor interface issues are examples of yield destroying defects that are difficult to detect by conventional inline scan. SRAM-based bitmap proved to be crucial to unveil these defects using focus-ion beam (FIB) to obtain precise cross-sectional view of the failed bits.