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A voltage-controlled oscillator (VCO) with a current subtraction bias (CSB) for compensating the CMOS process-and-temperature variations is proposed and analysed. The design, fabrication, and testing of a clock generator with a VCO using CSB and conventional fixed bias (FB) is reported. Measurement results demonstrate that the frequency range of CSB selection has 36% reduction against that of FB selection and the temperature coefficient of 76% reduction.
Date of Publication: 16 Oct. 2003