Upset due to a single particle caused propagated transient in a bulk CMOS microprocessor

Data pattern advances observed in preset, single event upset (SEU) hardened clocked flip-flops, during static Cf-252 exposures on a bulk CMOS microprocessor, were attributable to particle caused anomalous clock signals, or propagated transients. SPICE simulations established that particle strikes in the output nodes of a clock control logic flip-flop could produce transients of sufficient amplitude and duration to be accepted as legitimate pulses by clock buffers fed by the flip-flop's output nodes. The buffers would then output false clock pulses, thereby advancing the state of the present flip-flops. Masking the clock logic on one of the test chips made the flip-flop data advance cease, confirming the clock logic as the source of the SEU. By introducing N/sub 2/ gas, at reduced pressures, into the SEU test chamber to attenuate Cf-252 particle LETs, a 24-26 MeV-cm/sup 2//mg LET threshold was deduced. Subsequent cyclotron tests established an LET threshold of 30 MeV-cm/sup 2//mg (283 MeV Cu at 0 degrees ) for the generation of false clocks.<
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