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Profiling interrupt handler performance through kernel instrumentation

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3 Author(s)
B. Moore ; Dept. of Comput. Sci. & Eng., Notre Dame Univ., Notre Dame, IN, USA ; T. Slabach ; L. Schaelicke

As a result of technology trends towards multigigahertz processors, the I/O system is becoming a critical bottleneck for many applications. Interrupts are a major aspect of most device drivers. Characterizing interrupt performance and its relation to architectural trends is important for understanding and improving I/O subsystem performance. Kernel instrumentation in combination with performance counters is able to overcome the limitations of microbenchmarks when measuring interrupts. A comparative analysis of a range of IA-32 based systems reveals that interrupt handler code exhibits only a low degree of instruction-level parallelism. Consequently, the trend towards deeper processor pipelines and smaller caches to maximize clock frequency can be detrimental to interrupt handling performance.

Published in:

Computer Design, 2003. Proceedings. 21st International Conference on

Date of Conference:

13-15 Oct. 2003