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A transparent voltage conversion method and its application to a dual-supply-voltage register file

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2 Author(s)
N. Tzartzanis ; Fujitsu Lab. of America, Sunnyvale, CA, USA ; W. W. Walker

We present a new method that facilitates low-to-high voltage conversion in dual-supply-voltage systems. This method leverages from the operation principles of dynamic precharged gates to completely eliminate the area and delay overhead incurred by explicit voltage conversion circuits. A 34 word×64 bit, 10 read, 6 write, write-through, dual-supply-voltage experimental register file was implemented in 0.11μm, 1.2 V CMOS based on this voltage conversion method. The second supply voltage is used to power internal high-capacitance nodes. Laboratory measurements indicate that when both supply voltages are 1.2 V, the register file dissipates 262 pJ per cycle and has a 1 ns access time. When the internal supply voltage is reduced to 0.7 V, the register file dissipates 191 pJ per cycle and has a 1.5 ns access time.

Published in:

Computer Design, 2003. Proceedings. 21st International Conference on

Date of Conference:

13-15 Oct. 2003