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Automatic coarse-grain partitioning and automatic code generation for heterogeneous architectures

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5 Author(s)
Raulet, M. ; CNRS UMR 6164 IETR, INSA Rennes, France ; Babel, M. ; Deforges, O. ; Nezan, J.F.
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Real time signal, image, and control applications have very important time constraints, involving the use of several powerful numerical calculation units. The aim of our project is to develop a fast and automatic prototyping process dedicated to parallel architectures made of both PC and several last generation Texas Instruments digital signal processors: TMS320C6X DSP. The process is based on SynDEx, a CAD software improving algorithm implementation onto multiprocessor architectures by finding the best matching between an algorithm and an architecture. SynDEx kernels for automatic PC and DSP dedicated code generation have been developed with the new SynDEx functionalities. A full coding application illustrates the results. The application is an image compression algorithm called LAR (locally adaptive resolution).

Published in:

Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on

Date of Conference:

27-29 Aug. 2003