System Maintenance:
There may be intermittent impact on performance while updates are in progress. We apologize for the inconvenience.
By Topic

Delay analysis of BiNMOS driver including high current transients

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Yuan, J.-S. ; Dept. of Electr. Eng., Univ. of Central Florida, Orlando, FL, USA

The BiNMOS gate delay analysis including high current transients has been developed. The modeling equations account for the high electric field effect in the nMOS transistor and emitter crowding, base pushout, and base conductivity modulation in the bipolar transistor. In examining the switching transient of a BiNMOS driver, the base pushout mechanism exhibits a detrimental effect on the gate propagation delay. The circuit modeling methodology provides a fast turn-around design evaluation of sensitivity of process and device parameters into circuit performance. Computer simulation of a BiNMOS driver using the present analysis is compared with PISCES device simulation in support of physical reasoning

Published in:

Electron Devices, IEEE Transactions on  (Volume:39 ,  Issue: 3 )