Cart (Loading....) | Create Account
Close category search window

A 125MHz 8b digital-to-phase converter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ju-Ming Chou ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Yu-Tang Hsieh ; Jieh-Tsorng Wu

A digital-to-phase converter (DPC) generates a 125MHz clock with phase shift controlled by an 8b digital input. Averaging resistor rings are used for phase interpolation and phase error reduction by averaging. Implemented in a standard 0.35 /spl mu/m CMOS technology, the DPC achieves /spl plusmn/1 LSB differential nonlinearity and /spl plusmn/2 LSB integral nonlinearity. Power dissipation is 110mW with a 3.3V supply.

Published in:

Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International

Date of Conference:

13-13 Feb. 2003

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.