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A 100 MHz DDS with synchronous oscillator-based phase interpolator

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2 Author(s)
F. Badets ; STMicroelectronics, Crolles, France ; D. Belot

A synchronous oscillator-based phase interpolator is used to lower spurious tones of a 100 MHz 16 b DDS. The synchronous oscillator locked-loop produces an eight-phase clock with coarse phase interpolation, while eight identical oscillators coupled with a DAC provide accurate phase adjustment. Spurious tone reduction obtained with the accurate phase interpolation is about 20 dB.

Published in:

Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International

Date of Conference:

13-13 Feb. 2003