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Analysis of gate currents through high-k dielectrics using a Monte Carlo device simulator [MOSFET applications]

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4 Author(s)
Ohkura, Y. ; Semicond. Leading Edge Technol., Inc, Tsukuba, Japan ; Suzuki, C. ; Amakawa, H. ; Nishi, K.

The gate current through high-k dielectrics has been calculated by a Monte Carlo simulator. In high-k dielectrics, the gate current from the drain edge is dominant and is quite serious due to a lowering of the barrier height with an increasing dielectric constant. The stack structure of high-k dielectric and oxide films is effective to suppress gate current densities generated from high-energy carriers generated near the drain edge.

Published in:

Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on

Date of Conference:

3-5 Sept. 2003