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A novel technique for full-wave modeling of large-scale three-dimensional high-speed on/off-chip interconnect structures

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7 Author(s)
D. Jiao ; Logic Technol. Dev., Intel Corp., Santa Clara, CA, USA ; M. Mazumder ; S. Chakravarty ; C. Dai
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This paper presents a novel, rigorous, and fast method for full-wave modeling of high-speed interconnect structures. In this method, the original wave propagation problem is represented into a generalized eigenvalue problem. The resulting eigenvalue representation can comprehend conductor and dielectric losses, arbitrary dielectric and conductor configurations, and arbitrary materials such as dispersive, and anisotropic media. The edge basis function is employed to accurately represent the unknown field, and the triangular element is adopted to flexibly model arbitrary geometry. A mode-matching technique applicable to lossy system is developed to solve large-scale 3D problems by using 2D-like CPU time and memory. A circuit-based extraction technique is developed to obtain S-parameters from the unknown fields. The proposed technique can generate S-parameters, full-wave RLGC, propagation constants, characteristic impedances, voltage, current, and field distributions, and hence yield a comprehensive representation of interconnect structures. Experimental and numerical results demonstrate its accuracy and efficiency.

Published in:

Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. International Conference on

Date of Conference:

3-5 Sept. 2003