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Write disturbance in the cross-point addressing scheme employed in most of today's magnetoresistive random access memories (MRAM) designs presents practical limitations in memory element down-size scaling. In this paper, we present a new vertical MRAM design that is free of write disturbance. Its performance is analyzed via micromagnetic modeling. A memory element in this design is of an annular shape and consists of two ferromagnetic layers with a nonmagnetic interlayer. The interlayer can be either a tunnel barrier for a magnetic tunnel junction or metal layer for a current-perpendicular-to-plane/giant magnetoresistive stack. Injecting a pulsed current in a nanosecond time scale vertically through the memory element performs the switching between the two memory states with relatively low current threshold. Each memory element is connected to a corresponding transistor that performs both write and read addressing.