Theoretical and experimental investigation of Si nanocrystal memory device with HfO₂ high-k tunneling dielectric

In this paper, silicon (Si) nanocrystal memory using chemical vapor deposition (CVD) HfO₂ high-k dielectrics to replace the traditional SiO₂ tunneling/control dielectrics has been fabricated and characterized for the first time. The advantages of this approach for improved nanocrystal memory operation have also been studied theoretically. Results show that due to its unique band asymmetry in programming and retention mode, the use of high-k dielectric on Si offers lower electron barrier height at dielectric/Si interface and larger physical thickness, resulting in a much higher J_{g,programming}/J_g,retention ratio than that in SiO₂ and therefore faster programming and longer retention. The fabricated device with CVD HfO₂ shows excellent programming efficiency and data-retention characteristics, thanks to the combination of a lower electron barrier height and a larger physical thickness of HfO₂ as compared with SiO₂ of the same electrical oxide thickness (EOT). It also shows clear single-electron charging effect at room temperature and superior data endurance up to 10⁶ write/erase cycles.