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This paper presents a novel approach to the design of direct digital frequency synthesizers (DDFSs) with phase-to-sinusoid amplitude conversion blocks based on linear interpolation. For such DDFSs, the first quadrant of the sine function is approximated with a number of linear segments. Simple control circuitry reconstructs a full sine wave by symmetry. DDFS architectures using linear interpolation are first discussed, and an analysis of their spectral properties is given. From this analysis, an upper bound is provided for the spurious free dynamic range (SFDR) that can be attained for a given number of linear segments. A detailed and systematic procedure for the selection of linear segment coefficients achieving a desired SFDR is then proposed. A generalized multiplierless linear interpolation DDFS architecture is described, and specific designs achieving 84 and 96 dBc of SFDR are discussed and compared with previous work. It is shown that the complexity of synthesizers based on the new approach, in terms of the number of transistors and silicon area, is significantly less than that of previously presented DDFS designs of similar performance.