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Temperature and process invariant MOS-based reference current generation circuits for sub-1V operation

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3 Author(s)
S. Tang ; Microprocessor Res., Intel Corp., Hillsboro, OR, USA ; S. Narendra ; V. De

Measurements on a prototype chip, implemented in a 150 nm logic process technology, validate the theories for two sub-1V MOS reference current generator circuits and show that ∼2× reduction in current variation is achievable across extremes of both process and temperature.

Published in:

Low Power Electronics and Design, 2003. ISLPED '03. Proceedings of the 2003 International Symposium on

Date of Conference:

25-27 Aug. 2003