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RODOS (Reverse-Order source/drain formation with Double Offset Spacer) was proposed for low-power, high-speed and low-noise amplifiers. Relying on simulation data, we confirmed the high feasibility of the RODOS process. It showed improved performance in linearity (VIP3). Additionally, by optimizing process parameters, we achieved small gate delay (CV/I) and low static/dynamic power consumption. The process satisfied most of the requirements of LOP and LSTP in ITRS 2002. Finally, we found that devices with the RODOS structure can be a promising alternative to implement low-power, high-speed and low-noise amplifiers for radio on a chip.