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Effective graph theoretic techniques for the generalized low power binding problem [IC high level synthesis]

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2 Author(s)
Davoodi, A. ; Dept. of Electr. & Comput. Eng., Maryland Univ., College Park, MD, USA ; Srivastava, A.

This paper proposes two very fast graph theoretic heuristics for the low power binding problem given a fixed number of resources and multiple architectures for the resources. First, the generalized low power binding problem is formulated as an integer linear programming (ILP) problem which happens to be an NP-complete task to solve. Then two polynomial-time heuristics are proposed that provide a speedup of up to 13.7 with an extremely low penalty for power when compared to the optimal ILP solution for our selected benchmarks.

Published in:
Low Power Electronics and Design, 2003. ISLPED '03. Proceedings of the 2003 International Symposium on

Date of Conference: 25-27 Aug. 2003

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