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Performance analysis of fixed, reconfigurable, and custom architectures for the SCAN image and video encryption algorithm

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3 Author(s)
Dollas, A. ; Dept. of Electron. & Comput. Eng., Tech. Univ. of Crete, Chania, Greece ; Kachris, C. ; Bourbakis, N.

This paper briefly presents a block cipher encryption architecture and a reconfigurable logic-based hardware design for the SCAN encryption algorithm. Detailed performance results are presented for still images as well as video, and the reconfigurable architecture is compared to software-only implementations of the same algorithm as well as a preliminary ASIC design.

Published in:
Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on

Date of Conference: 9-11 April 2003

Page(s):
19 - 28
Print ISBN:
0-7695-1979-2
INSPEC Accession Number:
7756115
Digital Object Identifier :
10.1109/FPGA.2003.1227238
Product Type:
Conference Publications

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