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The power consumption is the most important issue in the design of integrated circuits for mobile electronics. In this paper a new approach employing a current injection transistor to the output stage in order to inject the additional current needed for the large-signal settling in that interval and off in the remaining small-signal regime is presented. This technique decreases the power consumption in a fast-settling high-slew-rate operational amplifier driving a large capacitive load. Using this technique, a 1.8-V 3.3-mW op-amp driving a 4-pF load is designed with a 2Vp-p,diff 12-bit settling time of less than 11ns in a 0.35-μm CMOS process. HSPICE simulations confirm that this approach can reduce the power consumption by considerable amounts as high as 50%.
Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on (Volume:2 )
Date of Conference: 10-11 July 2003