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Compact model of MOSFET electron tunneling current through ultra-thin SiO/sub 2/ and high-k gate stacks

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5 Author(s)
Fei Li ; Microelectron. Res. Center, Texas Univ., Austin, TX, USA ; Mudanai, S.P. ; Yang-Yu Fan ; Register, L.F.
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In this paper, we present an accurate, physics-based compact modeling tool for tunneling current through ultra-thin gate dielectrics including high-k gate stacks. This work extends our previous work on physics-based compact modeling of the CV of ultrathin oxides.

Published in:

Device Research Conference, 2003

Date of Conference:

23-25 June 2003