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50 Gbit/s low-jitter dynamic decision circuit using Cbc compensation and semi-feed forward techniques

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6 Author(s)
H. Nosaka ; NTT Photonics Labs., NTT Corp., Kanagawa, Japan ; K. Ishii ; H. Nakajima ; M. Ida
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A new low-jitter dynamic decision circuit is designed and fabricated using InP/InGaAs HBTs. Cbc compensation transistors and semi-feed forward loads are adopted to eliminate waveform distortion and residual double trace, respectively. A fabricated decision IC achieves error-free operation and wide eye opening for 50 Gbit/s 231-1 PRBS with 0.68 W power dissipation. Its RMS and peak-to-peak jitter of output data are 0.59 and 4.1 ps, respectively.

Published in:

Electronics Letters  (Volume:39 ,  Issue: 16 )