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Low-latency multiple clock domain interfacing without alteration of local clocks

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2 Author(s)
Smith, S.F. ; Boise State Univ., ID, USA ; Frenzel, J.F.

A method for interfacing synchronous blocks of logic with different local clocks is presented which introduces very little latency and avoids metastability. The method does not require stopping or stretching local clocks and enforces correct operation of a bundled data constraint for all but very wide data paths.

Published in:

University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial

Date of Conference:

30 June-2 July 2003