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A planner 6.3 nm thin-body SOI MOSFET using tunnel epitaxy and nitrided gate oxides

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4 Author(s)
Ahmed, S.S. ; Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; Neudeck, Gerold W. ; Denton, J.P. ; Stidham, M.E.

A single-gate UTB SOI MOSFET was fabricated using tunnel epitaxy to form the silicon channel as thin as 6.3 nm. Experimental electrical measurements were conducted on a variety of devices, and the results are summarized. Low leakage currents were measured including gate leakage of 15 pA and device leakage of 1.1 pA. Measured I□V characteristics also included subthreshold slopes of 67 mV/dec., DIBL of 10 mV/V, and drive currents up to 280□A.

Published in:

University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial

Date of Conference:

30 June-2 July 2003