Referenced Items are not available for this document.
A hierarchical waveform-relaxation-based method for analysis of bipolar, MOS, and GaAs FET circuits is presented. By analyzing the circuit in a hierarchical manner, a faster solution has been obtained for circuits exhibiting strong bidirectionality and feedback than has previously been possible. The technique has been applied to a wide variety of digital and mixed analog/digital circuits, and circuits containing over 18000 transistors have been analyzed. Results obtained for a variety of circuits show up to two orders of magnitude improvement in computation time compared to conventional circuit simulation techniques and up to one order of magnitude improvement compared to the standard waveform-relaxation technique.<
Published in:
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Date of Conference: 7-10 Nov. 1988
- Page(s):
- 442 - 445
- Meeting Date :
- 07 Nov 1988-10 Nov 1988
- Print ISBN:
- 0-8186-0869-2
- INSPEC Accession Number:
- 3362217
- Conference Location :
- Santa Clara, CA, USA
- Digital Object Identifier :
- 10.1109/ICCAD.1988.122545
- Product Type:
- Conference Publications
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