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A new inverse discrete wavelet packet transform architecture

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5 Author(s)
Paya, G. ; Digital Syst. Design Group, Univ. Politecnica de Valencia, Spain ; Peiro, M.M. ; Ballester, F.J. ; Herrero, V.
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In this paper we present a new architecture and its scheduling algorithm for the 1-D inverse discrete wavelet packet transform. The proposed architecture is based on the classical recursive pyramid algorithm (RPA). We use two different RPA-modified blocks to compute three complete levels. We make use of folding and retiming techniques to improve the area and speed-rate. Two different implementations using lifting transformation and polyphase decomposition for the CDF2.2 biorthogonal wavelet coefficients are discussed. The lifting implementation requires approximately 45% less hardware resources than the polyphase structure. Finally, internal pipelining delays minimize the logic depth to one adder.

Published in:

Signal Processing and Its Applications, 2003. Proceedings. Seventh International Symposium on  (Volume:2 )

Date of Conference:

1-4 July 2003