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High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture

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12 Author(s)
S. H. Olsen ; Sch. of Electr., Electron. & Comput. Eng., Newcastle Univ., UK ; A. G. O'Neill ; L. S. Driscoll ; K. S. K. Kwa
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Performance enhancements of up to 170% in drain current, maximum transconductance, and field-effect mobility are presented for nMOSFETs fabricated with strained-Si channels compared with identically processed bulk Si MOSFETs. A novel layer structure comprising Si/Si0.7Ge0.3 on an Si0.85Ge0.15 virtual substrate (VS) offers improved performance advantages and a strain-compensated structure. A high thermal budget process produces devices having excellent on/off-state drain-current characteristics, transconductance, and subthreshold characteristics. The virtual substrate does not require chemical-mechanical polishing and the same performance enhancement is achieved with and without a titanium salicide process.

Published in:

IEEE Transactions on Electron Devices  (Volume:50 ,  Issue: 9 )